We start with the equation of 2:1 MUX, where inputs to the mux are ‘A’ and ‘B’. Select is ‘S’ and output pin is ‘Out’.

Out = S * A + (S)bar * B

We need to come with an OR gate, hence we need to keep the ORing term ‘+’ in the equation, this means that we can not tie ‘S’ to 1 or 0. Because of tie ‘S’ to 1 or 0, one of the terms in the equation of MUX will have a product of 0 and that term will disappear.

What I mean is :

If we tie ‘S’ to 0. Out = 0 * A + (0)bar * B = 0 + B = B

If we tie ‘S’ to 1. Out = 1 * A + (1)bar * B = A + 0 * B = A

In both cases we look the ORing term ‘+’.

Same way, we can not tie either ‘A’ or ‘B’ to zero to maintain the ‘+’ term.

Lets start with ‘A’ and tie to 1.

Out = S * 1 + (S)bar * B

Out = S + (S)bar * B

This is what we end up with. We really want : Out = S + B.

If you are a master at boolean algebra or digital logic, you can look at equation

Out = S + (S)bar * B

and tell that it’s equivalent to

Out = S + B

But do not worry. We’ll prove that to be the case.

Out = S + (S)bar * B

(Out)bar = (S + (S)bar * B)bar [ taking bar of both sides ]

(Out)bar = (S)bar * ((S)bar * B)bar [ Applying De-morgan’s rule on right hand side ]

(Out)bar = (S)bar * (S + (B)bar) [Applying De-morgan’s rule on right most term]

(Out)bar = (S)bar * S + (S)bar * (B)bar [Expanding right hand side]

(Out)bar = 0 + (S)bar * (B)bar [Simplifying first term on right hand side]

(Out)bar = (S)bar * (B)bar

(Out)bar = (S + B)bar [Applying De-morgan’s rule on right hand side]

Out = S + B [Taking bar of both sides]

Hence we prove that if we tie input ‘A’ to 1, for a 2:1 MUX, we get an OR gate.

Figure 1. OR gate using 2:1 MUX.

Next we will look at the NAND gate using 2:1 MUX.

-SS