As we discussed in previous post, we can start with the equation of the MUX and reduce it down to equation of an AND gate like following.
For a 2:1 MUX with input A and B and select S and output Out, following is the equation.
Out = S * A + (S)bar * B
We can see that first product term in the sum of products on right hand side is actually an AND operation. All we need to do is zero out the second product term. We can achieve this by making B as ‘0’. We can tie B input of MUX to zero.
Out = S * A + (S)bar * 0
Out = S * A + 0
Out = S * A
Thus we can get an AND gate by tying B input of MUX to zero, resulting circuit is AND gate which ANDs input A and mux select S.
Following figure shows this arrangement.
Figure 1. AND gate using 2:1 MUX
How about an OR gate using 2:1 MUX ?